VLIW Microprocessors

When Transmeta Corp., a 5-year-old Santa Clara, Calif.-based start-up in the CPU business, revealed its new Crusoe family of processors last month, experts weren't surprised to learn that the chips are based on Very Long Instruction Word (VLIW) technology.

For one thing, Transmeta's patent disclosures had tipped the secretive firm's hand more than a year ago. But beyond that, VLIW has become the prevailing philosophy of microprocessor design, eclipsing older approaches such as RISC and complex instruction set computing (CISC).

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The Quest for Parallelism

All microprocessor designs seek better performance within the limitations of their contemporary technology. In the 1970s, for example, memory was measured in kilobytes and was very expensive. CISC was the dominant approach because it conserved memory.

In a CISC architecture such as Intel Corp.'s x86, which was introduced in 1978, there can be hundreds of program instructions — simple commands that tell the system to add numbers, store values and display results. If all instructions were the same length, the simple ones would waste memory. Simple instructions require as little as 8 bits of storage space, while the most complex consume 120 bits.

Variable-length instructions are more difficult for a chip to process, though, and the longer CISC instructions are especially complex. Nonetheless, to maintain software compatibility, modern x86 chips such as Intel's Pentium III and Advanced Micro Devices Inc.'s Athlon must still work with

all troublesome CISC instructions that were designed in the 1980s, even though their original advantage — memory conservation — isn't as important.

In the 1980s, RAM chips got bigger and bigger in capacity while their prices dropped. The emphasis in CPU design shifted to raw performance, and RISC became the new philosophy. Examples of RISC architectures include SPARC from Sun Microsystems Inc.; the MIPS Rxxxx series from Mountain View, Calif.-based MIPS Technologies Inc.; Digital Equipment Corp.'s Alpha; the PowerPC, which was jointly developed by IBM and Schaumburg, Ill.-based Motorola Inc.; and Hewlett-Packard Co.'s PA-RISC.

RISC chips use a rather small number of relatively simple, fixed-length instructions, always 32 bits long. Although this wastes some memory by making programs bigger, the instructions are easier and faster to execute.

Because they have to deal with fewer types of instructions, RISC chips require fewer transistors than comparable CISC chips and generally deliver higher performance at similar clock speeds, even though they may have to execute more of their shorter instructions to accomplish a given function.

The simplicity of RISC also makes it easier to design superscalar processors — chips that can execute more than one instruction at a time. This is called instruction-level parallelism, and it's the Holy Grail of CPU architects. Almost all modern RISC and CISC processors are superscalar. But achieving this capability introduced significant new levels of design complexity.

VLIW is the latest way to simplify processors. VLIW chips don't need most of the complex control circuitry that superscalar chips must use to coordinate parallel execution at runtime. Instead, VLIW chips shift more of that burden onto compilers.

The software development tools that programmers use to compile their programs into executable code are responsible for arranging the instructions in the most efficient manner.

Also, VLIW chips combine two or more instructions into a single bundle or packet. The compiler prearranges the bundles so the VLIW chip can quickly execute the instructions in parallel, freeing the microprocessor from having to perform the complex and continual runtime analysis that superscalar RISC and CISC chips must do.

No Free Lunch

VLIW chips can cost less, burn less power and achieve significantly higher performance than comparable RISC and CISC chips. But there are always trade-offs. One is code expansion — programs grow larger, requiring more memory. Far more important, though, is that compilers must get smarter. A poor VLIW compiler will have a much greater negative impact on performance than would a poor RISC or CISC compiler.

But even with the best compilers, there are limits to how much parallelism a VLIW processor can exploit. A good RISC or CISC design might do just as well with the software that most users run.

VLIW isn't a magic bullet, but it's the new wave in microprocessor design. Within a few years, it's certain that at least some of your software will be running on VLIW chips.

Halfhill is a microprocessor analyst at Cahners MicroDesign Resources and is a senior editor at “The Microprocessor Report.”

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