"Strain is one example that we did in the past, but using germanium instead of silicon is certainly a possibility that is being researched. Even more exotically, going to III-V material provide advantages," Holt said. "And then there are new devices that are being evaluated as well as different forms of integration."
The family of III-V materials includes gallium arsenide.
The U.S. government's National Science Foundation is leading an effort called "Science and Engineering behind Moore's Law" and is funding research on manufacturing, nanotechnology, multicore chips and emerging technologies like quantum computing.
Sometimes, not making immediate changes is a good idea, Holt said, pointing to Intel's 1999 transition to the copper interconnect on the 180-nm process. Intel was a late mover to copper, which Holt said was the right decision at the time.
"That equipment set wasn't mature enough at that point in time. People that moved [early] struggled mightily," Holt said, adding that Intel also made a late move to immersion lithography, which saved the company millions of U.S. dollars.
By the time Intel moved to immersion lithography the transition was smooth, while the early adopters struggled.
The next big move for chip manufacturers is to 450-mm wafers, which will allow more chips to be made in factories at less cost. Intel in July last year invested $2.1 billion in ASML, a tools maker, to enable smaller chip circuits and larger wafers. Following Intel's lead, TSMC (Taiwan Semiconductor Manufacturing Co.) and Samsung also invested in ASML. Some of TSMC's customers include Qualcomm and Nvidia, which design chips based on ARM processors.
Intel's investment in ASML was also tied to the development of tools for implementation of EUV (extreme ultraviolet) technology, which enables more transistors to be crammed on silicon. EUV shortens the wavelength range required to transfer circuit patterns on silicon using masks. That allows creation of finer images on wafers, and chips can carry more transistors. The technology is seen as critical to the continuance of Moore's Law.
Holt could not predict when Intel would move to 450-millimeter wafers, and hoped it would come by the end of the decade. EUV has proved challenging, he said, adding that there are engineering problems to work through before it is implemented.
Nevertheless, Holt was confident about Intel's ability to scale down and to remain ahead of rivals like TSMC and GlobalFoundries, which are trying to catch up on manufacturing with the implementation of 3D transistors in their 16-nm and 14-nm processes, respectively, next year. But Intel is advancing to the second generation of 3D transistors and unlike its rivals, also shrinking the transistor, which will give it a manufacturing advantage.
Speaking about Intel's rivals, Holt said, "Since they have been fairly honest and open they are going to pause area scaling, they won't be experiencing cost saving. We will continue to have a substantial edge in transistor performance."
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