Everspin ships first ST-MRAM memory with 500X performance of flash
The current DIMM has 64MB capacity
Everspin Technologies today announced what it is calling the industry's first Spin-Torque Magnetoresistive RAM (ST-MRAM) chip, which offers an alternative to non-volatile DRAM sub systems.
Everspin said the new memory type is not targeted to replace volatile DRAM in the near future.
An Everspin spokesperson wrote in an email reply to Computerworld that ST-MRAM "gives system designers a new storage class memory tool that complements, not replaces, DRAM or NAND. System designers are excited about the benefit of persistent, high endurance storage or memory and will target the 64Mbit density at buffer and cache memory in storage applications and main memory in many industrial applications. Everspin plans to scale up density and performance while reducing cost in its ST-MRAM roadmap going forward."
The new memory type has about 500 times the speed of NAND flash but the endurance of DRAM. ST-MRAM is seen by industry analysts as complementary technology to NAND flash memory, which is used to make solid-state drives (SSDs).
Everspin sees its ST-MRAM being used as buffer memory in SSDs, for I/O and network cache and as an ultra-fast tier of storage, as some DRAM manufacturers use their products today.
"Everspin is first out with this as far as I know, and we see lots of interest in ST-MRAM to be used in conjunction with NAND in data center storage applications," said Joseph Unsworth, research vice president at Gartner.
The 64Mbit chip is the first in Everspin's ST-MRAM roadmap. The company said it plans to scale to gigabit density memories with faster speeds. Everspin is shipping to system manufacturers samples of its first chip, the EMD3D064M 64Mb DDR3 ST-MRAM. The current dual in-line memory module (DIMM) has 64MB capacity, including error correction code.
Jeff Janukowicz, research director for solid-state storage at IDC, said memory technologies face significant challenges to deliver the right balance of performance, power consumption, and reliability as they scale to smaller process forms.
Everspin's 64Mb ST-MRAM chip is functionally compatible with the industry standard JEDEC specification for the DDR3 interface, which delivers up to 1.6 billion transfers per second per I/O, translating to memory bandwidth of up to 3.2 GB/sec with nanosecond-class latency. The product is offered in an industry standard Window Ball Grid Array (WBGA) package-- the same as the DDR3 standard.
A 1Gbit MRAM chip would use 400 milliwatts of power, compared to a 64Gbit NAND flash chip, which uses 80 milliwatts of power, according to Everspin.
While suggested pricing for the new ST-MRAM chips was not released, Everspin said it is about 50 times more expensive than NAND flash, meaning it's not viable as a mass storage device. However, in terms of performance, ST-MRAM can produce 400,000 random write I/Os per second (IOPS) using 4K blocks compared to NAND flash with 800 random IOPS.
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