Intel: Six-core chip to ship by second half '08

Computerworld - Intel Corp. today announced that it expects to ship a six-core processor to resellers in the second half of this year.

With 1.9 billion transistors and 16MB of Level 3 cache, the six-core chip, code-named Dunnington, will be built with Intel's new 45 nanometer technology, according to Pat Gelsinger, a senior vice president and general manager of Intel's Digital Enterprise Group.

"The big cache and six cores will give customers a nice bump in performance," Gelsinger said during a press briefing today about the company's product road map and its upcoming Intel Developer Forum, slated to be held next month in Shanghai. "We're quite excited about it."

He said that the company plans to demonstrate the Dunnington chip at the IDF.

Dan Olds, an analyst at Gabriel Consulting Group Inc., said moving beyond quad-core processors, which to date have been the high-water mark in the semiconductor industry, is a major step -- one that keeps Intel well ahead of rival Advanced Micro Devices Inc. Just last week, AMD confirmed that it started shipping its triple-core Phenom processors.

"For AMD, it just means that they're falling a little bit further behind, unless they have some plans in the works that we're not privy to yet," added Olds. "A six-core is a big deal … but most desktop software can't really take advantage of dual-core yet, so this means that this chip is aimed directly at servers -- at least until consumer software gets better at multicore threading."

Intel, which only moved to the 45nm process late last year, also announced today that it plans to start producing 32nm chips in either 2009 or 2010. Gelsinger said the first 32nm chip is slated to be a shrunken version of Nehalem, an upcoming four-core chip. The 32nm chips are code named Westmere.

During the press conference, Intel also said that it plans to start production of the Nehalem chips in the fourth quarter of this year. The 45nm Nehalem chips will include an integrated memory controller, eliminating the need for a front-side bus. Gelsinger explained that the new Nehalem architecture is modular, which means Intel should be able to build a chip using different building blocks that should be able to scale from two to eight cores.

Nehalem is also being designed to have two-way, simultaneous multithreading, to use Intel's QuickPath interconnect, and to have a three-level cache hierarchy. Gelsinger said more information on the Nehalem specs will be disclosed at the IDF.

Intel also reaffirmed to reporters that its upcoming Tukwila chip, an upgrade from the Itanium family, is due out by the end of the year.