Computerworld - Samsung Electronics Co. today announced that it has built a 64Gbit NAND flash memory chip.
The new flash storage device utilizes 30-nanometer processing technology and was developed using Samsung's self-aligned double patterning technology (SaDPT), said Samsung officials.
The company said it plans to start manufacturing 30-nm 64Gbit NAND flash devices during 2009. Samsung has already applied for as many as 30 patents for the new flash memory chip, officials said in a statement.
By combining a total of 16 separate 64Gbit flash devices, businesses can create a 128GB flash storage device capable of holding up to 80 DVD movies or 32,000 MP3 music files, noted Samsung.
While some analysts have forecasted of somewhat sluggish NAND demand in 2007-2008, Gartner Inc. has predicted that sales of 64Gbit NAND flash and other higher density flash storage devices could reach $20 billion by 2011.
Joseph Unsworth, an analyst at Stamford, Conn.-based Gartner, called Samsung's achievement "impressive" but openly questioned the company's ability to mass produce the technology with good yields. "Samsung has had a difficult time adhering to its timelines for mass production due to the complexity of MLC architectures and ever shrinking process geometries," remarked Unsworth.
Samsung said that its new double-pattern technology creates a wider-spaced circuit design of the target process in the first pattern transfer and fills in the spaced area more closely with its second pattern transfer on the chip.
Although NAND already has a strong grip on multimedia handsets, Unsworth said vendors must find ways to cut its price and provide more compelling benefits in terms of boot up speed, reliability and power efficiency to make a significant impact on computing capacity.
Samsung said it has also designed and constructed a 32Gbit NAND flash storage chip using the same technology as its new 64Gbit offering.
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