IBM blends three manufacturing techniques in 970FX

IDG News Service - IBM released further details today about the manufacturing process used to create its 90-nanometer PowerPC 970FX chip, its first chip built on the smaller process generation.
The 90-nanometer process technology used to create the 970FX chip is a blend of strained silicon, silicon on insulator (SOI) and copper wiring, IBM said ahead of a presentation about the chip next week at the International Solid State Circuits Conference in San Francisco. Samples of the chip have already shipped, and production volumes are increasing, an IBM spokesman said.
Apple Computer Inc. will be the first customer for the new chip. IBM and Apple confirmed that the XServe G5, announced in January at MacWorld, will use the 90-nanometer 970FX. Apple will more than likely adopt the chip for a new series of PowerMac desktops to be released later this year.
The PowerPC chip uses a different instruction set than the x86 instruction set found in Intel Corp. or Advanced Micro Devices Inc.'s chips. The processor is similar to AMD's Athlon 64 chip in that it allows Apple users to run both 32- and 64-bit applications on the same chip.
Customers will be able to use the PowerPC 970FX chip in everything from PCs to notebooks to networking equipment, said Norman Rohrer, senior technical staff member at IBM. The unique power-tuning technique used in the chip allows it to vary power consumption thousands of times per second, reducing the overall power consumption compared with a chip that consumes a constant amount of power.
IBM's strained silicon manufacturing technique involves a layer of nitrate that wraps around the silicon transistors. The atoms in the two substances naturally align when placed together, and that process actually stretches the silicon channel through which electrons flow. More electrons can flow down the channel if the opening is wider, and more electrons equals more performance.

Intel used a similar technique to create its newest Pentium 4 processor, formerly known as Prescott. Prescott was announced last week and is available in systems for major PC vendors.
One of the major concerns of chip designers at this process generation is current leakage. The dimensions in silicon chips are reaching such tiny sizes that electrons can start to break through the features and leak out of the processor as heat. This heat can disrupt system performance and require expensive cooling solutions to manage.
To prevent current leakage, IBM has implemented SOI on its last two process generations. The SOI technique requires chip makers to build transistors on top of a silicon wafer

Reprinted with permission from

IDG.net
Story copyright 2009 International Data Group. All rights reserved.