QuickStudy: Very Long Instruction Word (VLIW) Microprocessors
When Transmeta Corp., a 5-year-old Santa Clara, Calif.-based start-up in the CPU business, revealed its new Crusoe family of processors last month, experts weren't surprised to learn that the chips are based on Very Long Instruction Word (VLIW) technology.
For one thing, Transmeta's patent disclosures had tipped the secretive firm's hand more than a year ago. But beyond that, VLIW has become the prevailing philosophy of microprocessor design, eclipsing older approaches such as RISC and complex instruction set computing (CISC).
The Quest for Parallelism
All microprocessor designs seek better performance within the limitations of their contemporary technology. In the 1970s, for example, memory was measured in kilobytes and was very expensive. CISC was the dominant approach because it conserved memory.
In a CISC architecture such as Intel Corp.'s x86, which was introduced in 1978, there can be hundreds of program instructions simple commands that tell the system to add numbers, store values and display results. If all instructions were the same length, the simple ones would waste memory. Simple instructions require as little as 8 bits of storage space, while the most complex consume 120 bits.
Variable-length instructions are more difficult for a chip to process, though, and the longer CISC instructions are especially complex. Nonetheless, to maintain software compatibility, modern x86 chips such as Intel's Pentium III and Advanced Micro Devices Inc.'s Athlon must still work with
all troublesome CISC instructions that were designed in the 1980s, even though their original advantage memory conservation isn't as important.
In the 1980s, RAM chips got bigger and bigger in capacity while their prices dropped. The emphasis in CPU design shifted to raw performance, and RISC became the new philosophy. Examples of RISC architectures include SPARC from Sun Microsystems Inc.; the MIPS Rxxxx series from Mountain View, Calif.-based MIPS Technologies Inc.; Digital Equipment Corp.'s Alpha; the PowerPC, which was jointly developed by IBM and Schaumburg, Ill.-based Motorola Inc.; and Hewlett-Packard Co.'s PA-RISC.
RISC chips use a rather small number of relatively simple, fixed-length instructions, always 32 bits long. Although this wastes some memory by making programs bigger, the instructions are easier and faster to execute.
Because they have to deal with fewer types of instructions, RISC chips require fewer transistors than comparable CISC chips and generally deliver higher performance at similar clock speeds, even though they may have to execute more of their shorter instructions to accomplish a given function.
The simplicity of RISC also makes it easier to design superscalar processors chips that can execute more than one instruction at a time. This is called instruction-level parallelism, and it's the Holy Grail of CPU architects. Almost all modern RISC and CISC processors are superscalar. But achieving this capability introduced significant new levels of design complexity.


- Excel 2010 Cheat Sheet
- Register for this Computerworld Insider Cheat Sheet and gain access to hundreds of premium content articles, guides, product reviews and more.
- Practice Management: Double Billing Rate and Improve Patient Services
- Would you like to double your billing rate and achieve faster payment for services?
Download this customer success story to see how One Health... - Mission Critical Data Explosion and Customer Case Study
- Would you like to double your tier 1 storage capacity while simultaneously reducing your storage footprint?
Download this customer success story to see how... - Protecting Against Database Attacks and Insider Threats: Top 5 Scenarios
- Read this new eBook to learn the top five scenarios and essential best practices for preventing database attacks and insider threats.
- Database Activity Monitoring Is Evolving
- Read the analyst report and learn how you can leverage the core capabilities of a DAP solution for better database security.
- Establishing a Strategy for Database Security is No Longer Optional
- The options for securing increasingly valuable databases are very broad and deep, and can be confusing. This research provides an overview of three... All Topic Center White Papers
- Live Webcast
Data Privacy and Protection in Production Environments: New Research from Ponemon Institute - Date: Wednesday, June 13, 2012, 1:00 PM EDT / 10:00 AM PDT
In a recent study conducted by Ponemon Institute, fifty-five percent of respondents... - Live Webcast
A Geek's Guide to Presenting to Business People - Live Webcast: Wednesday, June 20th at 1:00 PM EDT
Join this live webinar with Paul Glen, author of Leading Geeks, to learn how to... - Live Webcast
Today's NAS: A Solution Beyond Old Limits - Date: Tuesday, July 17, 2012 2:00 PM EDT
Traditional NAS systems don't scale beyond fixed limits. Proliferation of NAS systems leads to management... - Distributed Database Security with Real-time Monitoring
- View this demo and learn how IBM InfoSphere Guardium database activity monitoring can help protect your sensitive data in distributed DBMS environments with...
- InfoSphere Warehouse Packs Demo
- These flash modules make warehousing more tangible and relevant to business users through detailed explanations of the InfoSphere Warehouse Packs.
- Delivery Management -- Extending Lifecycle Management
- Date: Wednesday, June 20, 2012, 1:00 PM EDT
Siloed organizations continue doing the wrong things and doing things wrong, leading to increased costs,... - Leverage automation today to reduce IT complexity
- Date: Tuesday, June 5, 2012, 2:00 PM EDT
Whether your B2B complexity is caused by multiple technologies due to M&A, business or application specific... - Redefine Expectations in the Data Center
- Need to do more with less? Watch this video to learn how HP ProLiant Gen8 servers can help your business deploy servers three... All Topic Center Webcasts