Supercomputer Users Plan Fast Quad Adoption
Computerworld -
Users of high-performance computers are already making plans for x86-based, quad-core processors due from Intel Corp. next month and from Advanced Micro Devices Inc. by mid-2007.
> By year’s end, the Louisiana Optical Network Initiative (LONI), a network of high-performance computers run by eight state research universities, expects to have 1,440 Intel quad processors, code-named Clovertown, running on Dell servers and delivering 50 trillion floating-point operations per second (TFLOPS) of power.
> Officials declined to disclose the cost of the systems.
When combined with the installed IBM p5 servers running various Intel processors, the capacity of the LONI network is expected to reach 85 TFLOPS.
> Meanwhile, the Texas Advanced Computing Center at the University of Texas in Austin intends to buy 13,000 quad-core processors from AMD to run on Sun Microsystems Inc. servers. The quad-core Opteron chips are due out by mid-2007, according to AMD.
Intel Quads | |
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The $59 million purchase will be funded by the National Science Foundation as part of its project to build a 400-TFLOPS system.
> Widespread use of the quad systems depends on the development of software that can take advantage of the technology, noted John Fruehe, worldwide business development manager for Opteron at AMD. Each core in a multicore processor runs at a lower clock speed than single-core chips, and performance gains depend on how well the software can run in parallel environments, he said. “So much more relies on the software than ever before,” Fruehe said.
> Boyd Davis, director of marketing for the server products division at Intel, noted that many server-based business applications have already been adapted for multicore environments. “In a server market, most of the applications that customers care about have already been built with multithreading in mind,” he said.
> Many high-performance applications, such as those the Texas Advanced Computing Center plans to run on its Opteron quad chips, use the Message Passing Interface (MPI) communication protocol to work in large parallel environments. Tommy Minyard, assistant director at the center, said researchers there plan to find ways to improve the protocol’s ability to increase the performance of applications running on quad chips.
> One problem with the protocol, Minyard said, is that it causes network communications to use significant processor overhead. “If processors are trying to communicate
processors
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