Computerworld - Only some of the Trips magic is in hardware. The rest is in software.
It's in the Trips compiler for Fortran and C, to be exact. It employs a number of innovative techniques aimed at boosting microprocessor performance without putting added burdens on the programmer. "We believe that Trips provides a sweet spot, with the appropriate division of responsibilities between the compiler and hardware," says professor Kathryn McKinley, compiler lead on the project.
Previous data-flow architectures, such as those developed at MIT in the 1970s and '80s, required special programming languages to simplify the compiler. "But Trips limits data flow to a fixed-size instruction block ... [and that] simplifies the compiler's job considerably compared to previous data flow architectures," McKinley says.
But, she adds, "we aren't done yet. We have not yet tuned classic optimizations such as unrolling and in-lining, and there are a number of compiler heuristics and policies that need tuning in vivo rather than in simulation, especially for large programs."
And the compiler will ultimately have to be rewritten. "It is written for robustness and ease of research experimentation rather than for speed of compilation," McKinley says. "A next-generation Trips compiler is probably needed for commercialization."
Read more about Hardware in Computerworld's Hardware Topic Center.
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