Intel and Micron Technology today announced the delivery of 3-bit-per-cell NAND flash memory on 25-nanometer lithography technology. The new flash memory chips represent the industry's highest-capacity and smallest NAND device to date, the companies said.
A single slide from a presentation leaked yesterday also showed Intel increasing the capacity of its solid-state drives (SSD) to 600GB through the use of memory chips with twice the capacity of current devices.
The slide shows a refresh of Intel's line of consumer-class SSDs, including the popular X25-M drive. The X25-M currently comes in 80GB and 160GB capacities. By utilizing the 25nm technology, the new models will have 160GB, 300GB and 600GB.
According to the slide, Intel also expects to double the capacity of its X25-V entry-level drive, which is targeted at the netbook and tablet market. The current X25-V offers 40GB capacity. That will be replaced with an 80GB model.
An Intel spokeswoman said the company does not comment on products that have not officially been announced.
The companies have sent initial product samples to select customers. Intel and Micron expect to be in full production by the end of the year.
The 3-bit-per-cell NAND flash chips are targeted for flash cards, USB drives and MP3 players. The companies' SSDs continue to use 2-bit-per-cell and 1-bit-per-cell NAND flash.
Last August, Intel and Micron's joint venture company, IM Flash Technologies (IMFT), announced its first 3-bit-per-cell NAND flash memory technology using its 34nm lithography process. The advancement represented an 11% reduction in NAND flash size. However, because of reliability issues, IMFT chose to discontinue production of a 3-bit NAND flash product.
In January, IMFT then introduced the industry's first 25nm NAND flash technology. That chip held 2 bits of data, making a multilevel cell (MLC) NAND flash, compared with a single-level cell (SLC) NAND, which holds 1 bit per cell.
The new NAND flash is a combination of the latter two technologies.
IMFT said its new 64Gbit 3-bits-per-cell memory chip offers even greater densities and will further reduce the base price of NAND flash.
IMFT's 25nm 8GB die, which measures 0.35 by 0.74 in., is made up of many smaller 64Gbit NAND chips. The NAND technology makes it possible to build products using half as many chips as the previous 34nm lithography technology, allowing for smaller, higher-density designs. For example, a 256GB SSD can be built with 32 of the 8GB NAND flash dies instead of 64 dies; a 32GB smartphone needs just four dies; and a 16GB flash card requires only two. The change also cuts the overall cost to produce mobile products.
The device is more than 20% smaller than the same capacity of Intel and Micron's 25nm MLC in production today.
"With January's introduction of the industry's smallest die size at 25nm, quickly followed by the move to 3-bit-per-cell on 25nm, we continue to gain momentum and offer customers a compelling set of leadership products," Tom Rampone, general manager of Intel's NAND solutions group, said in a statement. "Intel plans to use the design and manufacturing leadership of IMFT to deliver higher-density, cost-competitive products to our customers based on the new 8GB 25nm NAND device."
"We are already working to qualify the 8GB TLC NAND flash device within end-product designs, including higher-capacity products from Lexar Media and Micron," Brian Shirley, vice president of Micron's NAND solutions group, said in a statement.
Lucas Mearian covers storage, disaster recovery and business continuity, financial services infrastructure and health care IT for Computerworld. Follow Lucas on Twitter at @lucasmearian or subscribe to Lucas's RSS feed . His e-mail address is firstname.lastname@example.org.